1. Field of the Invention
The present invention relates to power factor correction (PFC), and more specifically to multiple mode power factor correction, and to drivers for PFC controllers.
2. Description of Related Art
An electrical load may appear to a power supply as a resistive impedance, a capacitive impedance, an inductive impedance, or a combination thereof. When the current is in phase with or at least very close to being in phase with the voltage, the power factor is said to be good. When an electrical load is purely resistive, the current passing to the load is proportional to the voltage crossing the load. The power factor of such an electrical load is close to one. The power factor is less than one in all other situations. If an electrical load is not purely resistive, it may introduce noise into the power line and may increase power losses through transmission lines. To reduce the noise to the power line caused by electrical loads, power supplies with an electrical power output above 30 watts may be required to have power factor corrections, so as to shape the input current waveform to follow the input voltage waveform. Power companies may require their customers to maintain their power factors above a specified amount, e.g., 0.90 or higher.
Boost converters are used for power factor correction. FIG. 1 shows a block diagram of one example of a boost converter. A capacitor 101 filters input current ripple. A four-way rectifier 102 rectifies an input voltage Vin. When a boost switch 103 is closed, an operating cycle starts. The power source Vin charges a boost inductor 104 via an input current I1n, and energy is stored in the boost inductor 104. When I1n reaches a value determined by a controller 105, the controller 105 outputs a signal to open the boost switch 103, and the inductor 104 discharges via a load 106. When the boost switch 103 has been opened for a period of time determined by the controller 105, or the input current I1n falls to a value determined by the controller 105, the controller 105 outputs a signal to close the boost switch 103, and the next operation cycle starts. A boost diode 107 prevents current from flowing back to the boost inductor 104 from the load 106. A capacitor 108 filters high frequency noises of the rectified Vin and a capacitor 109 removes ripples in the output voltage Vout.
Conventional boost converters use one of three operation modes: continuous mode (also called average current mode), discontinuous mode, or critical mode, but cannot switch among them.
FIG. 2A shows a block diagram of a conventional power factor correction controller for the continuous mode. A power factor correction controller has two tasks. The first is to regulate the output voltage Vout to keep it stable. The second is to regulate the input current I1n to make it follow the waveform of the input voltage Vin, mimicking that the load is purely resistive. As shown, a subtractor 201 subtracts a reference voltage Vref from the output voltage Vout to obtain a voltage error Verr, which is then amplified by a voltage amplifier 202. The subtractor 201 and the voltage amplifier 202 are used to regulate Vout to keep the output stable.
The input voltage is a sine wave. To make a load appear as a purely resistive load, the input current needs to be regulated as a sine wave in the same phase as the input voltage. A multiplier 203 multiplies the amplified Verr from the voltage amplifier 202; the rectified input voltage Vinrec; and the normalized root mean square value of the rectified input voltage Vinrec from a low pass filter 204 and a normalizer 205. The output of the multiplier 203 is a factor Cref. A subtractor 206 subtracts the factor Cref from the input current I1n of the boost converter, obtaining a current error Cerr, which is amplified by an amplifier 207 and is then used to control a pulse width modulator (PWM) 208.
The period, Ts, of the charging and discharging cycle in the continuous mode is fixed. The charging time is determined by the amplified current error Ceaout. Thus, the discharging time is Ts minus the charging time. The resulting switch voltage Vsw is then used to control the boost switch 103 shown in FIG. 1.
FIG. 2B illustrates the voltage waveform and current waveform of a conventional boost converter in continuous mode. The current in continuous mode never goes to zero, except at the edges. The benefit of running continuous mode is lower ripple current, so that the controller only needs a small input filter. However, at a given power level, if the continuous mode is used, the size of the inductor must be large in the full cycle.
FIG. 3A shows a block diagram of a conventional power factor correction controller for the critical mode. Similarly to the power factor correction controller shown in FIG. 2A, the power factor correction controller for the critical mode obtains an amplified voltage error by a subtractor 301 and a voltage amplifier 302. A zero current detector 303 finds zero current points in the input current I1n. A PWM 308 is coupled to the outputs of the voltage amplifier 302 and the zero current detector 303. In the critical mode, the charging time is fixed and is determined by the voltage amplifier 302, and the boost inductor 104 keeps discharging until a zero current point is met.
FIG. 3B illustrates the voltage waveform and current waveform of a conventional boost converter for the critical mode. As shown, the boost inductor keeps discharging until a zero current point is met. When the critical mode is used, the size of the inductor can be small, but the ripple current is very high, thus requiring a large input filter.
FIG. 4 illustrates the voltage waveform and current waveform of a conventional boost converter in discontinuous mode. As shown, the input current I1n remains off for a certain time interval between each charging and discharging cycle. The discontinuous mode also has high ripple current and needs a large input filter.
Another disadvantage of conventional boost converters is that their current harmonic distortions start to increase when the load is lowered.
A further disadvantage of the conventional boost converters is that their responses in certain frequency bands are very slow. If they respond too fast, there will be large spikes.
Therefore, it would be advantageous to provide a method and apparatus for controlling the boost converters in multiple modes during power factor correction, so as to keep both the boost inductor and the input filter small.
Power factor correction, or PFC, may be used to counteract the undesirable effects of electric loads which create a power factor that is less than 1. FIG. 5 illustrates a block diagram of an existing PFC controller. The PFC controller may be used to convert an AC signal to a high voltage DC signal Vout, and at the same time, maintain the power factor of the load as close to 1 as possible. As shown, an AC input voltage Vin may pass through an electromagnetic interference (EMI) filter and input rectifier stage 501 first and become a half sine wave. A pulse-width modulation (PWM) controller 502 may output an SW signal to control a boost output loop. The boost output loop may include a boost switch 503, a boost diode 504 and an output electrolytic capacitor 505. The boost switch 503 may be, e.g., an NMOSFET.
When the boost switch 503 is closed, the power source Vin may charge a boost inductor 506 via an input current I1n, and energy may be stored in the boost inductor 506. When I1n reaches a certain value, the PWM controller 502 may open the boost switch 503 and the boost inductor 506 may discharge via a load 507. When the boost switch 503 has been opened for a certain period of time or the input current I1n falls below a certain value, the PWM controller 502 may close the boost switch 503, and the next operation cycle may start. The boost diode 504 may prevent current from flowing back to the boost inductor 506 from the load 507, a capacitor 509 may remove ripples in the output voltage Vout, and a capacitor 508 may filter high frequency noises of the rectified Vin.
In the PFC controller shown in FIG. 5, the output signal SW of the PWM controller 502 may directly drive gate of the NMOSFET 503 to 250 W. In high frequency applications, the SW signal may turn on and off very fast, and the sharp edge gating may cause a very high di/dt switching current and consequently EMI effect in the boost output loop. In addition, parasitic inductance in the boost output loop may cause high voltage oscillation across the boost switch 503 with the risk of avalanche breakdown or power loss.
Therefore, it would be desirable to provide an apparatus to control the SW pin slew rate, so as to maintain a good di/dt and avoid spike current oscillations in the PFC controller.